Combining technology, device design and simulation, and applications, this book is the first to deal with the design and optimization of transistors made from strained layers. Topics include background theory of the HBT, device simulation that predicts the optimum HBT device structure for a particular application, compact SiGe-HBT models for RF applications and the SPICE parameter extraction, and the enhancement of the high-frequency performance of HFETs using MOSFET or MODFET structures. The book also covers the design and application of optoelectronic devices and assesses how SiGe technology competes with other alternative technologies in the RF wireless communications marketplace.
Surface acoustic waves (SAWs) demonstrate simplicity of their excitation and receipt, as well as their availability to all propagation ways of signal branching and processing. SAW devices are divided into several main classes: filters for signal processing at intermediate frequencies, delay lines, resonators, filters with low losses for the input circuits of receiver, and antenna duplexers for the connected receivers. The SAW devices are not only able to conduct an effective signal processing, but also serve as a basis for multi-subsystems (matched filtering, signal processing, real-time Fourier transform processors, etc.). Additionally, SAW filters help scientists to realise the wide variety of frequency characteristics. Besides their unique electrical characteristics, SAW devices favorably differ from their analogs in small size, mechanical strength and high reliability, due to the quality of raw materials and their processing. The use of the photolithography and the achievements of group microelectronic technology in their production allow a researcher to achieve good reproducibility of parameters at relatively low cost. In addition, currently SAW devices are widely used in various sensors based on the SAW radio frequency identification. This book presents an attempt to generalise a multi-year experience on R&D of SAW devices. It develops original approaches directed at discovering solutions of technical problems, as development of various SAW devices are patented in Russia. Moreover, the book presents some experimental and theoretical research results.
This book provides an important link between the theoretical knowledge in the field of non-linier physics and practical application problems in microelectronics. It delivers different levels of understanding of the physical phenomena that play a critical role in limitation of the semiconductor device capabilities, physical safe operating area limitation, and different scenarios of catastrophic failures in semiconductor devices. The book focuses on power semiconductor devices and self-triggering pulsed power devices for ESD protection clamps. The purpose of the book is popularization of the physical approach for reliability assurance. Another unique aspect of the book is the role of local structural defects, their mathematical description, and their impact on the reliability of the semiconductor devices.
One of the major challenges the book covers is the gap in understanding of major physical regularities between the theoretical knowledge in the field of non-linier phenomena in semiconductors and the reliability and ESD protection problems in process and device development, circuit design, TCAD, and applications.
This book serves as an invaluable reference to Power Electronics Design, covering the application of high-power semiconductor technology to large motor drives, power supplies, power conversion equipment, electric utility auxiliaries and numerous other applications.
The simplest method of transferring data through the inputs or outputs of a silicon chip is to directly connect each bit of the datapath from one chip to the next chip. Once upon a time this was an acceptable approach. However, one aspect (and perhaps the only aspect) of chip design which has not changed during the career of the authors is Moore s Law, which has dictated substantial increases in the number of circuits that can be manufactured on a chip. The pin densities of chip packaging technologies have not increased at the same pace as has silicon density, and this has led to a prevalence of High Speed Serdes (HSS) devices as an inherent part of almost any chip design. HSS devices are the dominant form of input/output for many (if not most) high-integration chips, moving serial data between chips at speeds up to 10 Gbps and beyond. Chip designers with a background in digital logic design tend to view HSS devices as simply complex digital input/output cells. This view ignores the complexity associated with serially moving billions of bits of data per second. At these data rates, the assumptions associated with digital signals break down and analog factors demand consideration. The chip designer who oversimplifies the problem does so at his or her own peril."
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